ECOC 2026 — TeraSignal, a leader in intelligent connectivity for AI infrastructure, today introduced AWP (Analog Wave Processor), a new high-speed signal-processing architecture that performs mathematical operations directly on broadband electrical waveforms.
Unlike conventional analog equalizers or DSP-based architectures that operate on digitized samples, AWP performs weighting, delay and accumulation directly on broadband waveforms in the analog domain. This enables advanced signal processing while preserving the low-power and low-latency advantages of linear interconnects. This wave-domain approach brings sophisticated signal-processing capabilities to linear interconnects while preserving their fundamental advantages of low power and low latency.
“Linear connectivity dramatically reduces power and latency, but scaling it to 200G per lane and beyond requires greater visibility into the channel and more powerful ways to correct impairments,” said Armond Hairapetian, CEO of TeraSignal. “TSLink tells us what is happening in the link. AWP gives us the ability to correct it. Together, they bring intelligence and advanced signal processing to linear interconnects without the power and latency of a conventional DSP.”
Wave-Domain Processing for Next-Generation AI Interconnects
AWP provides signal-processing capabilities designed for 200G/lane and future high-speed interconnects, including:
- Ultra-high-bandwidth wave processing with low power and latency
- Linear amplitude and phase response across wide bandwidths
- Equalization beyond the Nyquist frequency to address high-frequency channel impairments
- Wave-domain feed-forward equalization (FFE) for precursor and postcursor ISI correction
- Reflection mitigation through weighted and delayed waveform processing
AWP + TSLink: Intelligent Linear Connectivity
TSLink provides link intelligence. AWP provides wave processing. TSLink measures and identifies link and channel conditions, while AWP provides the wave-processing capabilities needed to compensate for impairments. Together, they increase link margin, improve robustness and extend the practical reach of DSP-free linear interconnects. By leveraging OIF’s CMIS-LT protocol, AWP works together with TeraSignal TSLink to create an intelligent closed-loop connectivity architecture.
Built Into TeraSignal’s 200G/Lane Lotus Platform
AWP is incorporated across TeraSignal’s new Lotus 200G/lane family, including the TS5802 copper redriver, TS8802 linear MZM driver and TS9802 linear TIA. Together with TSLink, these products provide a common intelligent connectivity architecture spanning both copper and optical AI interconnects, including ACC, LPO, NPO and CPO applications.
See AWP and TSLink at ECOC 2026
TeraSignal will demonstrate AWP and TSLink at ECOC 2026, September 21–23 in Málaga, Spain. Visit us at our main booth 1336 or see our live multi-vendor interoperability demonstrations at the OIF Booth 2126.
About TeraSignal
TeraSignal is a leader in intelligent interconnect technology for AI infrastructure, next-generation computing and linear optics. The company develops high-speed connectivity solutions designed to improve power efficiency, reduce latency and increase link reliability across optical and copper interconnects. Through innovations in advanced CMOS design, Analog Wave Processing (AWP) and TSLink adaptive link training, TeraSignal is enabling intelligent connectivity for next-generation AI scale-up infrastructure. Learn more at terasignal.com.
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